Automatic include dependencies for Make
Here is a Makefile that automatically generates header includes as dependencies. This information comes from Graham Shaw
This works because if there is no explicit rule for a .o target, Make will automatically create one using $(CXX) $(CPPFLAGS) $(CXXFLAGS) -c.
So the first time we try to compile a file we use the implicit rule and the -MP -MD will generated a dependency file. Any time after that the .o rule is included since the dependency file exists.
This works because if there is no explicit rule for a .o target, Make will automatically create one using $(CXX) $(CPPFLAGS) $(CXXFLAGS) -c.
So the first time we try to compile a file we use the implicit rule and the -MP -MD will generated a dependency file. Any time after that the .o rule is included since the dependency file exists.